Donald Yeung

Professor &
Associate Chair for Undergraduate Education
Department of Electrical and Computer Engineering

Affiliate Professor
Computer Science Department

1323 A. V. Williams
College Park, MD 20742
(301) 405-3649
yeung@umd.edu

Research Projects:

Monolithic 3D Integration of CPU and Main Memory Systems.

Programmable and Energy Efficient Extreme-Scale Processors.
Multicore reuse distance analysis is part of this project. Click here for details.

Approximate or Soft Computing.

Vortex: Optimizing Code and Memory using Spare Execution Resources.

Teaching:

ENEE 150--Intermediate Programming Concepts for Engineers (S21)

ENEE 446--Digital Computer Design (S20)

ENEE 646--Computer Architecture (F16)

ENEE 759A--Parallel Processing Computer Architectures (S06)

Students:

Daniel Gerzhoy

Devesh Singh

Candace Walden

Awards:

IBM Shared University Research Award, 2005.

NSF Faculty Early Career Development Award, 2001.

George Corcoran Memorial Teaching Award, 2000.

Curriculum Vitae: click here

Selected Publications: (click here for full list)

Monolithically Integrating Non-Volatile Main Memory Over the Last-Level Cache.: Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce Jacob, and Donald Yeung. To appear in ACM Transactions on Architecture and Code Optimization.
Analyzing the Monolithic Integration of a ReRAM-based Main Memory into a CPU's Die.: Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce Jacob, and Donald Yeung. IEEE Micro (Special Issue on Monolithic 3D Architectures). Vol. 39, Issue 6. November/December 2019.
Nested MIMD-SIMD Parallelization for Heterogeneous Microprocessors.: Daniel Gerzhoy, Xiaowu Sun, Michael Zuzak, and Donald Yeung. ACM Transactions on Architecture and Code Optimization. Vol. 16, No. 4, Article 48. December 2019.
Design for ReRAM-based Main-Memory Architectures.: Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, and Bruce Jacob. In Proceedings of the 5th International Symposium on Memory Systems (MEMSYS-V). Washington, DC. October 2019.

Studying the Impact of Multicore Processor Scaling on Directory Techniques via Reuse Distance Analysis.: Minshu Zhao and Donald Yeung. In Proceedings of the 21st International Symposium on High Performance Computer Architecture (HPCA-XXI). San Francisco Bay Area, CA. February 2015.

Unlocking the True Potential of 3D CPUs with Micro-Fluidic Cooling.: Caleb Serafy, Ankur Srivastava, and Donald Yeung. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'14). La Jolla, CA. August 2014.

Studying Multicore Processor Scaling via Reuse Distance Analysis.: Meng-Ju Wu, Minshu Zhao, and Donald Yeung. In Proceedings of the 40th International Symposium on Computer Architecture (ISCA-XL). Tel-Aviv, Israel. June 2013.
Efficient Reuse Distance Analysis of Multicore Scaling for Loop-based Parallel Programs.: Meng-Ju Wu and Donald Yeung. In ACM Transactions on Computer Systems. Vol. 31, No. 1. February 2013.
Coherent Profiles: Enabling Efficient Reuse Distance Analysis of Multicore Scaling for Loop-based Parallel Programs.: Meng-Ju Wu and Donald Yeung. In Proceedings of the 20th International Conference on Parallel Architectures and Compilation Techniques (PACT-XX). Galveston Island, TX. October 2011.

Last updated: March 2021 by Donald Yeung (yeung@eng.umd.edu)