ENEE312H, Spring 2002, University of Maryland, College Park
Instructor: TA:
Dr. Pamela Abshire Makeswaran Loganathan
2211 A. V. Williams Bldg.
pabshire@glue.umd.edu makeshl@glue.umd.edu
(301) 405-6629 (301) 405-5711
Tu Th 9:30-10:45am EGL 1202 Tu 8-9am EGR 1104
Office Hours: Tu 4-5:30pm, Th 11am-12:30pm

Course Description: The basic physical operation of PN-junction diodes, MOSFET's and Bipolar transistors.  Basic transistor circuit configurations (CE, CC CB, CS, CD, CG). DC bias; small signal analysis. Simple multitransistor circuits: diff-amp; current mirror. Frequency response.

Course Website: http://www.ece.umd.edu/~pabshire/enee312h.htm

Course Objectives: The objectives of the class are to develop an understanding the physical mechanisms governing the operation of electronic devices such as the diode and the transistor. Students will then use this information to analyze and design analog electronic circuits.

Topics Covered:

  1. Semiconductors materials, doping, electrons and holes;
  2. Analytical description of drift and diffusion of carriers and continuity equation;
  3. PN junction operation described through the analytical solution of the drift-diffusion model;
  4. Bipolar junction transistors (BJTs) physical operation;
  5. Physical basis of MOS field-effect transistor operation including threshold voltage and I-V characteristics;
  6. DC bias of Bipolar and FET fundamental analog circuits;
  7. Small signal analysis and design of fundamental transistor circuits;
  8. Difference amplifiers, current mirrors and active loads;
  9. Frequency response, including the Miller effect.

·Microelectronic Circuits, 4th ed., Sedra & Smith

·Physical Operation of the P-N Junction, Diodes, and Transistors, Jon Orloff (e-text available on course website)

·Supplemental readings from Microelectronic Devices and Circuits, Clifton Fonstad (on reserve in Engineering library)

Grading: The grading will be based on homework, two quizzes, a mid-term test, and a final exam. The following is a tentative weighting for determining overall grades.
Final exam 40% May 21 1:30-3:30pm
Midterm 20%
Quizzes (2) 20%
Homework 20% assigned Thursday, due Thursday by 6pm
Academic Integrity:

Academic dishonesty will not be tolerated.  All work submitted for grading must be your own.  The University Code of Academic Integrity, which can be found at http://www.inform.umd.edu/CampusInfo/Departments/JPO/, prohibits students from committing the following acts of academic dishonesty: cheating, fabrication, facilitating academic dishonesty, and plagiarism.  Academic dishonesty in this class includes outright copying on homework; however, discussing homework problems and exchanging tips is permissible and also encouraged.  Instances of academic dishonesty will be referred to the Office of Judicial Programs.

Tentative Schedule (subject to change):

Week 1 (Jan 29, 31): Introduction, basic electronic materials, doping

Week 2 (Feb 5, 7): motion of carriers: diffusion, drift

Week 3 (Feb 12, 14): excess carriers, PN junction

Week 4 (Feb 19, 21): depletion, bias, current flow through PN junction

Week 5 (Feb 26, 28): simple diode circuits, Quiz #1

Week 6 (Mar 5, 7): BJT intro, forward mode

Week 7 (Mar 12, 14): BJT reverse mode, current gain

Week 8 (Mar 19, 21): BJT single transistor amp, Midterm

Week 9 (Apr 2, 4): CE/CB/CC configurations, Ebers-Moll model

Week 10 (Apr 9, 11): BJT circuits

Week 11 (Apr 16, 18): MOSFETs

Week 12 (Apr 23, 25):  EKV model, small and large signal models

Week 13 (Apr 30, May 2): simple MOS circuits, Quiz #2

Week 14 (May 7, 9): op amps, frequency response, filters

Week 15 (May 14): integrated circuits